In the demonstration, we present NNgen, a high-level synthesis compiler that generates a custom DNN hardware circuit for FPGAs. NNgen is a fully-customizable compiler software written in Python. NNgen generates a model-specific optimized hardware circuit by employing model-dependent knowledge, in contrast to other DNN hardware synthesis compilers. So higher performance and lower circuit resource utilization can be achieved. You can see the live-coding demonstration of DNN hardware development using NNgen. You can try to develop an own custom hardware accelerator from your input model description on Jupyter notebook running on a demonstration PC, and can see the synthesized hardware description (Verilog HDL) and circuit behavior by RTL simulation. You can see also an FPGA-based realtime recognition system using NNgen.